The present invention is directed to a method and apparatus for use in the manufacture of a semiconductor device. More particularly, the present invention provides a method and apparatus for checking the integrity of a semiconductor device tester configuration used to test semiconductor devices during the manufacturing process.
The manufacture of a semiconductor begins with a substrate on a silicon wafer that is doped to create the basis for an electrical circuit. The wafer is processed according to known methods and ultimately placed into a package or carrier. After the semiconductor device has been packaged, the device must be tested prior to its end use to ensure that the electrical and functional characteristics of the device are within specified limits. To perform this step of the process, a device tester is used to exercise different aspects of the semiconductor device. The tester is programmed with appropriate control software that fully tests the electrical and functional characteristics of the semiconductor device. The device under test (DUT) is loaded by a device handler into a test socket, where the tests are conducted on the DUT. The device handler holds all devices to be tested and loads each one individually into the test socket, where it is exercised by the tester.
In order to ensure the reliability of the tester's results, the integrity of the test configuration must itself be verified at different stages during the testing process. If the test configuration is flawed in any way, unreliable output could result, which could mistakenly allow a bad device to pass the test and be integrated in end-use circuit designs, though it should not be, or allow a good device to mistakenly fail the test, which would result in the device not being used in end-use circuit designs, though it should be. In either case, the overall production cost of the device increases, while the device reliability decreases.
The test configuration is currently verified by the use of a device known as a "golden unit." A golden unit is of the same device type that is being tested, which might be, merely by way of example, a microprocessor, a memory chip or a programmable logic device. The golden unit is thoroughly tested so that its characteristics are precisely known. Therefore, in verifying the parameters of the device tester, the contribution of the golden unit is a known quantity. By eliminating all variables in the test configuration aside from the device tester itself, it is possible to verify whether the tester is performing as specified.
The drawback to using a golden unit to verify the test configuration is the time, money and effort needed to thoroughly test the device and record its characteristics. If a golden unit fails or becomes damaged by the handler while being loaded into the test socket, the characterization process, and the associated expenditure of time, money and effort, must be repeated for a new golden unit. Because the golden units represent such a large investment, manufacturers are actually often reluctant to risk placing them in handlers. This requires placement of the golden unit in the test socket by hand, slowing down the testing process. Therefore, a more inexpensive and convenient method and apparatus are desired for checking the integrity of a tester setup used in the manufacture of semiconductor devices.